Offset issues, such as DC offset in direct conversion (or low IF) receivers is a known concern that normally must be dealt with in order for these receivers to operate properly in communication systems. DC offset may be viewed as an error term that ends up added to and as part of a received signal. These offsets can result from various sources, including various mismatches within a receiver lineup, e.g., mismatches in quadrature mixers or other mismatches in other circuitry such as amplifiers, filters, and the like. These mismatches may be more pronounced in receiver lineups that are implemented substantially in integrated circuit form since techniques, such as suitable blocking capacitors, are not readily available to mitigate the DC error terms.
It may be important to rapidly and accurately determine and correct for these DC offsets in order to minimize signal acquisition times and the like. In many situations, such as relatively short symbol rate modulation and discontinuous transmission or signals with varying signal strength (changing gain control and thus transients), conventional techniques for determining DC offset do not allow for a rapid and accurate determination of DC offset. Conventional techniques generally include evaluating statistical properties, such as an average of the signal and this can be used in a DC offset correction loop. Averaging for a sufficient period of time to insure accuracy does not provide a DC offset determination in the appropriate time frame for many applications. Furthermore DC offset correction loops with practical bandwidths often have excessive settling time, i.e., long transient times and degraded receiver performance, for many applications.